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X86 architecture
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21	Chapter 8 Exceptional Control Flow From the time you first apply power to a processor until the time you shut it off, the program counter assumes a sequence of values a0 , a1 , . . . , an−1 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2010-02-14 14:17:30 Computing Computer architecture Software engineering Computer errors Interrupts Control flow X86 instructions Subroutines Unix signal General protection fault Interrupt flag Interrupt
22	SACK: a Semantic Automated Compiler Kit Colby T. Skeggs Applications o Rapid architecture testing o Automatically-generated architectures: o For security Add to Reading List Source URL: www.celskeggs.com Language: English Software Computing Computer architecture Compilers Instruction set architectures Programming language implementation Machine code GNU Compiler Collection X86 Assembly language LLVM NOP
23	Knights Landing (KNL): 2nd Generation Intel® Xeon Phi™ Processor Avinash Sodani KNL Chief Architect Senior Principal Engineer, Intel Corp. Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2015-08-21 02:18:27 Computing Computer architecture Computer engineering X86 instructions Intel Corporation Parallel computing Xeon Phi AVX-512 Intel Core CPUID Xeon Haswell
24	Geomatica 2016 System Specifications Operating Systems The following operating systems are supported: Operating System Type Add to Reading List Source URL: www.pcigeomatics.com Language: English - Date: 2016-03-29 17:29:23 Software Computing Virtual memory Computer architecture Memory management Paging System requirements Peripheral Component Interconnect X86 architecture PCI-X 3 GB barrier
25	Access We currently have a server with two Xeon Phi cards. The machine is called einstein.inf.ethz.ch. Get in contact with Timo Schneider if you want to have access to it. Usage To run a program on the MIC in native mode Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-11-03 06:29:07 Computing Parallel computing Computer architecture Manycore processors Intel Corporation Xeon Phi Xeon Intel Core X86 OpenMP Multi-core processor 512-bit
26	wgc2_OA_title.fm Page i Thursday, April 20, :25 PM fro m WRITE GREAT CODE V ol um e 2 : T hi nk in g Low -Lev el , W r i t in g Hi gh -Lev el Add to Reading List Source URL: tptp.cc Language: English - Date: 2013-08-27 07:52:46 Computer architecture Computing Computer engineering Instruction set architectures Central processing unit Microcontrollers X86 instruction listings Instruction set X86 Processor register Assembly language Intel MCS-51
27	Two Architecture Approaches for MILS Systems in Mobility Domains (Automobile, Railway and Avionik) Daniel Adam BMW Forschung und Technik Sergey Tverdyshev Add to Reading List Source URL: mils-workshop.euromils.eu Language: English - Date: 2015-01-11 14:02:14 Computer architecture Software Computing Hardware virtualization PikeOS X86 virtualization Hypervisor Virtualization Coprocessor Virtual machine Hyper-V ARM architecture
28	Intel Architecture Software Developer’s Manual Volume 1: Basic Architecture Add to Reading List Source URL: www.cs.bu.edu Language: English - Date: 2005-03-23 22:57:42 Computer architecture Computing Computer engineering Central processing unit X86 instructions X86 architecture Parallel computing MMX Streaming SIMD Extensions SIMD Processor register Instruction set
29	Intel SGX Explained Victor Costan and Srinivas Devadas , Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2016-08-12 18:27:31 Computing Computer architecture Computer hardware Computer memory Central processing unit Memory management Virtual memory Memory address Memory protection 64-bit computing X86 Random-access memory
30	CS:APP2e Web Aside ASM:SSE: SSE-Based Support for Floating Point∗ Randal E. Bryant David R. O’Hallaron August 5, 2014 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2014-08-05 12:50:10 Computer architecture Computing X86 instructions Computer engineering Streaming SIMD Extensions SSE2 MMX X86 MOVAPD X87 Processor register SSE3